1. Field of the Invention
The present invention relates to a semiconductor device and to a method of forming a semiconductor device.
The present invention is concerned with a broad class of semiconductor devices, and particularly integrated circuits, including microprocessors, analogue and digital CMOS, BiCMOS and smart-power circuits. The present invention has particular applicability to devices that use silicon-on-insulator (SOI) technologies though it is applicable to other technologies such as the bulk planar technologies.
2. Description of Related Art
A known problem of conventional integrated circuits is that they can suffer from self-heating due to excessive power developed within the active region of the circuit which is converted to heat. Heat in such circuits may be developed during on-state or transient operation and can be caused by DC, AC or RF electrical power. This heat can cause high temperature effects such as latch-up, parasitic bipolar conduction, reduction of channel mobility, and threshold voltage variation in MOS devices, and generally can cause reliability problems. Local heating or hot spots are particularly damaging to circuit performance and reliability.
In order to dissipate the heat and therefore to prevent high temperatures from being developed in the integrated circuits, various techniques are known. Examples are disclosed in U.S. Pat. Nos. 5,895,972, 5,650,639, 5,354,717, 5,109,268, EP-A-0552475, EP-A-0317124 and WO-A-94/15359. In most of these prior art disclosures, a silicon substrate is deposited as a layer on or bonded as a wafer to a diamond substrate and then appropriate processing steps (including doping, etc.) are carried out on the silicon in order to form the semiconductor devices.
In U.S. Pat. No. 5,895,972 there is disclosed a method and apparatus for cooling a semiconductor device during the testing and debugging phases during development of a device. In place of conventional heat slugs such as copper, a heat slug of material that is transparent to infra red is fixed to the device. A diamond heat slug is disclosed as preferred. It is disclosed that the substrate on which the device is formed can be thinned prior to applying the infra red transparent heat slug to the device. The purpose of this thinning of the substrate is solely to reduce transmission losses that occur during optical testing and debugging of the device using infra red beams. This process is carried out during development of the device. The heat slug is not used during normal operation of the device. Indeed, the device that has been tested in this way will normally be destroyed by this process as this testing is carried out to obtain data on the class of devices as a whole and is not for example part of the normal testing of a device intended for retail.
U.S. Pat. No. 3,689,992 discloses a technique for isolating various regions of a semiconductor device from each other. In one of the examples described, various insulator layers are laid over the back of the device and then a support layer, specifically exemplified by polycrystalline semiconductor material, is laid over the back of these insulator layers.
According to a first aspect of the present invention, there is provided a method of forming a semiconductor device having an active region, the method comprising the steps of: forming, in a layer provided on a semiconductor substrate, a semiconductor device having an active region; removing at least a portion of the semiconductor substrate below at least a portion of the active region such that said at least a portion of the active region is provided in a membrane defined by that portion of the layer below which the semiconductor substrate has been removed; and, applying a heat conducting and electrically insulating layer to the bottom surface of the membrane, the heat conducting and electrically insulating layer having a thermal conductivity that is higher than the thermal conductivity of the membrane so that the heat conducting and electrically insulating layer allows heat to pass from the active region into the heat conducting and electrically insulating layer during normal operation of the device.
Said at least portion of the semiconductor substrate may be removed by wet etching.
Said at least a portion of the semiconductor substrate may be removed by dry etching.
The heat conducting and electrically insulating layer most preferably comprises diamond. The diamond will typically be deposited as a layer of polycrystalline or amorphous diamond.
Alternatively or additionally, the heat conducting and electrically insulating layer may comprise at least one of boron nitride, aluminium oxide, and aluminium nitride.
The heat conducting and electrically insulating layer may be applied by blanket deposition.
The semiconductor device may be provided on an electrically insulating layer, the electrically insulating layer being provided on the substrate, and the step of removing at least a portion of the semiconductor substrate below at least a portion of the active region may comprise removing said at least a portion of the semiconductor substrate up to the electrically insulating layer. Such an embodiment may be a device of the silicon-on-insulator (SOI) type.
The method may comprise the step of removing plural discrete portions of the semiconductor substrate to provide plural membranes, each membrane having provided therein a respective active region of one or more semiconductor devices; and in the applying step, a heat conducting and electrically insulating layer may be applied to the bottom surface of each membrane.
The semiconductor device may be an integrated circuit.
According to a second aspect of the present invention, there is provided a semiconductor device manufactured in accordance with the method or any of its preferred embodiments described above.
According to a third aspect of the present invention, there is provided a semiconductor device having an active region that generates heat during normal operation of the device, at least a portion of the active region being provided in a membrane having opposed top and bottom surfaces, the bottom surface of the membrane having a heat conducting and electrically insulating layer positioned adjacent thereto, the heat conducting and electrically insulating layer having a thermal conductivity that is higher than the thermal conductivity of the membrane so that the heat conducting and electrically insulating layer allows heat to pass from the active region into the heat conducting and electrically insulating layer during normal operation of the device.
According to a fourth aspect of the present invention, there is provided a semiconductor device having an active region provided in a layer, the active region generating heat during normal operation of the device, the layer being provided on a semiconductor substrate, at least a portion of the semiconductor substrate below at least a portion of the active region being removed such that said at least a portion of the active region is provided in a membrane defined by that portion of the layer below which the semiconductor substrate has been removed, the bottom surface of the membrane having a heat conducting and electrically insulating layer positioned adjacent thereto, the heat conducting and electrically insulating layer having a thermal conductivity that is higher than the thermal conductivity of the membrane so that the heat conducting and electrically insulating layer allows heat to pass from the active region into the heat conducting and electrically insulating layer during normal operation of the device.
The device may comprise at least two semiconductor substrate legs between which the membrane is provided. In a typical embodiment, the substrate legs will be formed by removal of a portion of the substrate on which the device is initially formed. Such legs continue to provide mechanical support for the device.
The whole of the active region may be provided in the membrane.
The membrane may comprise a semiconductor layer provided on an electrically insulating layer.
The heat conducting and electrically insulating layer most preferably comprises diamond.
The heat conducting and electrically insulating layer may alternatively or additionally comprise at least one of boron nitride, aluminium oxide and aluminium nitride.
The heat conducting and electrically insulating layer is preferably deposited at lower temperatures compared to the temperatures used in processing the active structure of the device.
The membrane may include a mechanically strong and electrically insulating layer between said at least a portion of the active region and the heat conducting and electrically insulating layer.
The preferred embodiments of the present invention have several advantages over the prior art. The membrane and the heat conducting and electrically insulating layer are formed after the main technological steps involved in the fabrication of the circuit or device have been completed. Thus, mechanical support is provided by the original semiconductor substrate during the technological process. This means that this method is fully compatible with existing technologies such as CMOS, bipolar or bi-CMOS and can be carried out as a post-process fabrication step. Moreover, the heat conducting and electrically insulating layer can be applied to the back of the membrane by a blanket deposition after the membrane is formed and preferably at low temperatures such that the diffusion and the general geometrical and doping profile of the layers above are substantially unaffected. The membrane and heat conducting and electrically insulating layer may be provided under the entire circuit or under portions of the integrated circuit where hot spots occur to cool selectively parts of the integrated circuit. Unlike in prior art devices or circuits, the heat conducting and electrically insulating layer can be situated below the active structure in very close proximity, of the order of microns or sub-microns, to the active structure and makes a good and effective thermal contact to the top devices and circuits. The heat conducting and electrically insulating layer may be applied from the back side over an existing insulating layer such as are characteristic of silicon-on-insulator (SOI) structures and thus would not affect the back interface of the semiconductor layer. This is in contrast with the prior art case where a diamond substrate is bonded to silicon prior to fabrication of devices in the top silicon layer; this may result in the formation of a poor quality layer of silicon carbide layer at the silicon/diamond interface which in turn will affect the electrical performance of the devices and circuits. Finally, the heat conducting and electrically insulating layer can be provided from the back side over the whole area of the device or wafer. This layer may not need masking and photolithography and can be provided by blanket deposition. Therefore, the heat conducting and electrically insulating layer does not have to be etched selectively against the substrate or any other layers present in the device. This makes the fabrication process fully compatible with current integrated circuit technologies and significantly simpler than prior-art methods. Finally, the heat conducting and electrically insulating layer may be in contact with an external heat sink to further dissipate the heat.